1. |
Test point selection methods for the self-testing based analogue fault diagnosis system |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 173-183
C.C.Wu,
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摘要:
Two methods for selecting test points of an analogue circuit are presented. The purpose of making such a selection is to increase the testability of the self-testing algorithm which is used to allocate the defective components of a given analogue circuit. Some closed relations between network equations and network topology have been investigated so that the computational effort can be reduced to minimum. This comes up with the first test point selection method. The second method for selecting a proper set of test points for fault diagnosis is a table look-up approach by which no complex matrix computation is required. Instead, only a few searches, which are based on a simple rule, on a binary matrix are needed. The cost of applying this table look-up method is that the testability of the target circuit due to the selected test points may not be the highest. Both methods are applicable to linear and nonlinear circuits.
DOI:10.1049/ip-g-1.1985.0037
出版商:IEE
年代:1985
数据来源: IET
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2. |
Design and characterisation of a very low current to frequency convertor |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 184-188
A.El-Hennawy,
N.Saleh,
D.Borel,
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摘要:
A current to frequency convertor (CFC), fully integrated in aluminum gatep-channel enhancement/depletion MOS technology, is proposed. It is designed for measuring low level currents (10−13−10−8A). A feedback loop is used to obtain good linearity (better than 5%). Experimentally, the CFC works in the range 5 × 10−13−5 × 10−8A. Some nonlinearity problems are observed and explained in the paper.
DOI:10.1049/ip-g-1.1985.0038
出版商:IEE
年代:1985
数据来源: IET
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3. |
Compensative phase meter with lock-in detection |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 189-192
J.Siuzdak,
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摘要:
A compensative phase meter is described. It consists of two phase detectors, one integrator and one voltage-controlled phase shifter. Its operation is similar to that of a phase locked loop (PLL) except that the voltage-controlled oscillator in the PLL is replaced by a voltage-controlled phase shifter in the phase meter. Unlike other phase meters, no bias of the phase estimate occurs even when the signal is well below the noise level. The performance of the system is examined. The dependence of parameters such as phase jitter and acquisition time on loop and noise parameters is found. The influence of nonlinear characteristics of the phase shifter and the phase detector on the system performance is investigated.
DOI:10.1049/ip-g-1.1985.0039
出版商:IEE
年代:1985
数据来源: IET
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4. |
Design of finite-duration impulse response digital and charge-coupled device filters with arbitrary attenuation characteristics |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 193-199
H.Baher,
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摘要:
A novel analytic technique is given, for the derivation of finite duration impulse response transfer functions which satisfy arbitrary attenuation characteristics, with or without exact linear phase at all frequencies. The method uses a parameter for the determination of the stopband attenuation at the outset, and the rate of cutoff and the passband performance can be improved by increasing the order of the filter. The resulting solutions provide a marked improvement over the available analytic solutions, particularly where monotonic passband behaviour is required. The technique is also characterised by its simplicity and gives explicit expressions for the coefficients of the transfer function in the z-domain. This obviates the need for the various transformations commonly employed, and consequently improves the accuracy in determining the filter coefficients. The realisation of the resulting functions can be accomplished in either digital or charge-coupled device form.
DOI:10.1049/ip-g-1.1985.0040
出版商:IEE
年代:1985
数据来源: IET
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5. |
High-resolution switched-capacitor algorithmic digital-to-analogue convertor |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 200-204
K.Nagaraj,
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摘要:
A new high-resolution switched-capacitor algorithmic digital-to-analogue (D/A) convertor is described. It employs a novel voltage division technique to reduce errors owing to capacitor mismatch. This increases the linearity limit imposed by capacitor mismatch to 16 bits or more. The circuit possesses all the attractive features of the conventional algorithmic D/A convertors.
DOI:10.1049/ip-g-1.1985.0041
出版商:IEE
年代:1985
数据来源: IET
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6. |
Local state models form-dimensional operators |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 205-210
W.A.Porter,
J.L.Aravena,
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摘要:
Local state models have been widely considered for the realisation of 2-dimensional discrete time filters. This paper establishes the scope of local state models and extends this concept tomdimensions and partial differential equation settings.
DOI:10.1049/ip-g-1.1985.0042
出版商:IEE
年代:1985
数据来源: IET
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7. |
Two-dimensional convolution using number theoretic transforms without matrix transposition and without overlap |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 211-216
F.Marir,
A.Y.Md. Shakaff,
A.G.J.Holt,
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摘要:
The necessity of sectioning a large picture to compute a 2 dimensional convolution has many drawbacks, one of which is the size of the optimal sections. Starting from this consideration, it is shown that, if the input image array is a 22u× 22umatrix, the convolution can be computed efficiently using a small length Fermat number transform and, if enough fast memory space is provided, without transposing the matrix or overlap sectioning the input array. The paper investigates the case of pictures represented by approximately 1000 × 1000 pixels.
DOI:10.1049/ip-g-1.1985.0043
出版商:IEE
年代:1985
数据来源: IET
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8. |
On the realisation of asymmetric transmission zeros for crystal filter design |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 217-220
M.P.de Barros,
L.F.Lind,
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摘要:
The design of crystal filters with asymmetric amplitude characteristics is considered. A cascadedsection network is synthesised by the factorisation of the lossless chain matrix, in the lowpass (LP) domain. Special elementary sections, each realising a transmission zero on thejω-axis, are related to the lower-order matrices extracted. These sections contain LP crystal prototypes where the LP motional inductances can present any desired value, so that, after a lowpass to bandpass transformation and impedance scaling, the piezoelectric units of the final crystal filter can possess the same motional inductance. An example is given.
DOI:10.1049/ip-g-1.1985.0044
出版商:IEE
年代:1985
数据来源: IET
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9. |
The inverse problem to matrix polynomial factorisation and its application to circuit design |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 221-224
Z.W.Trzaska,
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摘要:
The second-order state-space technique is developed to accommodate the active circuit design process in the frequency domain. The concept of an eigenmatrix of linear second order multivariable circuit models uses, for the first time, the matrix polynomial of degree 2 to approach the design procedure on the basis of a given set of scalar frequencies. New theorems for the matrix roots of a matrix polynomial are proved. This leads to a novel form of linear active circuit design.Dans cet article on a développé une technique dans la méthode des variables d'état du deuxième ordre pour l'accomoder au processus de la synthèse des circuits actifs en domaine de fréquence. Un concept des matrices propres d'un circuit dynamique à variables multiples est introduit une première fois dans l'utilisation des polynômes matriciels du deuxième ordre pour approcher le processus de la synthèse sur la base d'un ensemble donné des fréquences scalaires. Des thérème nouveaux pour des racines materials d'un polynôme matriciel sont prouvés dans l'article. Ceci conduit à une méthode nouvelle de la synthèse des circuits dynamiques actifs.
DOI:10.1049/ip-g-1.1985.0045
出版商:IEE
年代:1985
数据来源: IET
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10. |
Design of precision switched-capacitor generalised integrators and their applications to the synthesis of nonlinear networks |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 132,
Issue 5,
1985,
Page 225-236
A.Cichocki,
R.Unbehauen,
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摘要:
The paper presents a novel approach to the design of generalised integrators using switched-capacitor techniques. These generalised integrators, which integrate with respect to a dependent variable, can easily be constructed in IC form using MOS technology and possess other attractive features, for instance low cost and precision. Potential applications of the generalised integrators to the synthesis of nonlinear devices and circuits are also considered in the paper. It is shown that the switched-capacitor generalised integrators can perform many useful basic nonlinear operations such as multiplication, division, trigonometric and logarithmic operations etc. Finally, experimental results are presented which are in close agreement with the theoretical results.
DOI:10.1049/ip-g-1.1985.0047
出版商:IEE
年代:1985
数据来源: IET
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