ISSN:0094-243X    

DOI:10.1063/1.42690

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

Since the time when the new failure mechanism, so‐called stress induced migration (SM), was firstly reported by J. Klemaet al. and J. Curryet al. in 1984, a lot of studies have been performed and been under study to understand the phenomena from the experimental and theoretical points of view. In this paper, recent typical works in Japan will be summarized. Works themselves are roughly classified into five areas as follows; 1. Effect of additional impurity in aluminum on SM phenomena, 2. Mechanism for the void formation, 3. Effect of a stress in aluminum interconnect on SM phenomena, 4. Effect of inter‐layer dielectric or passivation on SM phenomena, 5. Single crystalline aluminum for overcoming SM. We will describe the works quoting from the recent literature.

ISSN:0094-243X    

DOI:10.1063/1.42692

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

The yield strength of metallic thin films bonded to hard substrates, particularly with an additional passivation, can be significantly higher than is customary for bulk samples of the same metal. This is related to the constrained nature of deformation. The constraints place restrictive conditions on the mechanisms of deformation that produce stress relaxation. Because of this, the stresses are generally high and triaxial, which favors void nucleation. In narrow aluminum based metallizations bonded to ceramic substrates of lower thermal expansion coefficients, constraint effects give rise to exceptionally high tensile stresses subsequent to excursions to elevated temperatures. These stresses relax with time during cooldown, and also thereafter, even at room temperature. The degree of constraint, and thus the ensuing stresses at room temperature, is significantly larger for passivated line metallizations than for unpassivated continuous films or lines. Void growth arises naturally as a stress relaxation mechanism alternative to plastic flow. It is shown that in some hours after cooldown, stress relaxation in pure aluminum lines becomes limited by void growth. In the long run, after about a month, stress evolution and void growth are controlled by the relaxation of grain boundary back stresses by dislocation creep in the bulk.

ISSN:0094-243X    

DOI:10.1063/1.42682

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

The stress distribution in an aluminum interconnect for VLSI was calculated analytically by applying Eshelby’s method in micromechanics. The stresses were obtained as a function of the aspect ratio (r=thickness/width) of the Al line cross section. The yielding criteria in plasticity were applied to determine whether the calculated stresses can induce relaxation due to plastic deformation. The stress after plastic deformation were maximum at r=1. Direct X‐ray stress measurements for Al lines with various aspect ratios were carried out to verify our analytical model. The aspect ratios were varied by changing the line width while maintaining the line thickness constant, and vice versa. In either case, no maximum was found at r=1, in contrast with the results of the analytical calculation. This disagreement was attributed to the fact that the yield stress of Al line was assumed to be independent of the aspect ratio in our calculation. Using a diffusional growth model of grain boundary voids, the time to failure of the Al line was estimated analytically. Life tests of Al interconnects were carried out to examine the model with respect to life test temperatures, the Al line aspect ratios, and passivation structures. Most of the experimental results were in good agreement with the predictions of the model, except for the lifetime differences for different passivation materials. It was suggested that mechanical properties of the passivation films affect the void nucleation density.

ISSN:0094-243X    

DOI:10.1063/1.42693

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

Through investigation of stress‐migration, the following have been found. 1. The resistance of a stripe decreases by mechanical stress and/or temperature below the temperature of annealing. The ratio of decrease of resistance will be the important factor for the study of stress‐migration. 2. These sample structure with long lifetime on electromigration, does not always have long lifetime on stress‐migration. 3. Al‐Si‐Cu has a strong stress‐migration resistance. For relaxation of stress, Cu segregates at the aluminum grain boundary and the resistance decreases. 4. Stress induced open failure occurred at viaholes. This failure depends on the size of the viahole.

ISSN:0094-243X    

DOI:10.1063/1.42694

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

The large mechanical stresses normally present in thin film materials, both conductors and dielectrics, used to fabricate VLSI interconnections can result in immediate, or, even worse, delayed failures. A thorough understanding of the origin of the stresses, and changes during processing and in service, is needed for process development to minimize the quality and reliability harzards. Attaining this understanding requires experimental measurements on both uniform films and patterned lines, theoretical interpretation of the behavior of the materials during processing, and analysis of the interaction of the components of a patterned structure.Stress as a function of time and temperature has been determined for aluminum and copper films by the wafer curvature technique. A relatively simple model permits quantitative analysis of the data. The behavior of commonly used silicon oxide and silicon nitride dielectrics has also been studied. A special X‐ray diffraction technique has been developed for the measurement of strain in metal lines under dielectric. The experimental results are in excellent agreement with finite element calculations that include only thermal stress effects. The ‘‘intrinsic’’ stress in the dielectric plays no role in influencing the stress in the metal lines.Additional stress in the metal can result from solid state reactions at elevated temperatures during depositions or post‐deposition anneals. Several problems reported in the recent literature can be accounted for on the basis of such reactions.

ISSN:0094-243X    

DOI:10.1063/1.42695

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

Failure of interconnect metal lines by stress‐ and electromigration‐induced voiding is examined theoretically. By calculating the rate of growth of a single void in a passivated line subjected to an initial hydrostatic tension stress and by assuming that failure occurs when the void reaches a critical size, a model for failure of encapsulated interconnect lines by stress voiding can be developed. The model leads to a failure law for aluminum lines of the form tf&sgr;2/d=1019.2 exp(Q/RT), where tfis the failure time in seconds, &sgr; is the initial hydrostatic tension stress in the line in Pa, d is the grain size in meters and the activation energy, Q=80.9 kJ/mol, is close to that for grain boundary diffusion in aluminum.The effects of electromigration on void growth are also considered. It is shown that only limited void growth can occur by the sweeping of vacancies from other parts of the line. The amount of void growth by this process is too small to account for interconnect failures, unless very widely spaced ‘‘blocking’’ grain are assumed to exist in the line. Void growth by the migration and coalescence of small voids is shown to be more likely mechanism of electromigration failure.

ISSN:0094-243X    

DOI:10.1063/1.42696

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

Mechanical stresses in films arise from thermal expansion differences between the film and substrate, structural changes within the films, and intrinsic stresses from the deposition process. These stresses can lead to open circuit failures from voiding in interconnections, short circuits from hillocks, or delamination. Measurement of this stressin situas a function of temperature have proven to be an easy and powerful technique for obtaining information on the temperature, time, rate, and extent of formation of both solid‐state reactions and changes in morphology and structure. This information is helpful in obtaining an understanding and finding solutions for stress‐induced voiding. A theoretical model is developed for the stress change when precipitation occurs from elements in solid solution. The stress during thermal cycling was measured for aluminum, copper and silver on oxidized silicon substrates and for several aluminum alloys and layered films consisting of Si, Cu, Ti, W, Ta, V, Cu‐Cr and TiSi2. Correlating these changes using hot‐stage TEM and x‐ray diffraction has demonstrated that the stress changes do correspond to reactions and structural changes. In most films, there were changes in stress that correlated to phase changes. Morphological changes such as during secondary grain growth of ultralarge grains (50–100 &mgr;m) in Al/Cu/Cr films and its effect on stress was also examined. Finally, pure copper, Mo/Cu, and silver films exhibited several differences in behavior as compared to aluminum.

ISSN:0094-243X    

DOI:10.1063/1.42683

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

The continuing trend to ever‐greater density in microelectronic chips and corresponding advances in system sophistication and complexity place correspondingly greater demands upon chip reliability. For chip failure rates of several parts per million, allowed failures per length of interconnect become vanishingly small. Conventional accelerated life stressing depends upon accelerated conditions to obtain reliability evaluations within short times and with small sample sizes. Increasingly greater levels of acceleration are required to confidently project ever smaller failure rates. Acceleration for stress‐induced voiding, however, has an upper limit which is alloy dependent and affected by thermal history. Furthermore, in order for accelerated life stressing to be effective, an accurate physical model is required to calculate acceleration factors which relate accelerated conditions to use conditions. A comprehensive physical model of this type is not yet available for stress‐induced voiding. Life stresses of Al‐0.5%Cu‐2%Si interconnects passivated with different thicknesses of oxide, at temperatures ranging from 150 °C to 320 °C, exhibit complex behavior not amenable to interpretation by usual mehods, suggesting more severe limitations to accelerated testing for some metallizations.

ISSN:0094-243X    

DOI:10.1063/1.42684

出版商:AIP    

年代:1992

数据来源: AIP

摘要:

Newer IBM products have utilized sandwich metallurgies of high melting point transition metals such as Hf and Ti with Al‐4% Cu to enhance both electromigration and thermal void resistance. Both the center sandwich of Hf intermetallic and top and bottom layers of thin Ti have been utilized; the latter in our most recently announced products. This paper describes voiding characteristics of both of these type metallurgies under stress. The role of redundancy as well as inhibition of void nucleation at surfaces in reducing the thermal void threat is illustrated. While redundancy plays a major role in minimizing risk in the center stripe metallurgy, the Ti under‐over relies on both redundancy as well as suppressing surface nucleation of voids to essentially eliminate the risk of stripe failure. Additional insight into thermal void generation and stresses responsible has gained by heating completed structures with exposed vias to temperatures in excess of their initial insulation deposition temperature. Clear evidence of time temperature dependent metal creep was observed at these excess temperatures. This phenomenon was not observed to occur at sinter temperatures equivalent to the insulation deposition temperature. Based on these experiments process conditions to minimize voiding were developed which in combination with the Ti under over structure has virtually eliminated thermal void risk in our latest product.

ISSN:0094-243X    

DOI:10.1063/1.42685

出版商:AIP    

年代:1992

数据来源: AIP