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71. |
Insituballistic‐carrier spectroscopy on epitaxial CoSi2/Si(111) and Si(100) |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1848-1852
H. Sirringhaus,
E. Y. Lee,
U. Kafader,
H. von Känel,
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摘要:
Insituballistic‐electron‐emission microscopy (BEEM) and spectroscopy (BEES) have been performed at 77 K on CoSi2/Si(100) and Si(111) grown by molecular beam epitaxy (MBE). Scattering at individual interface dislocations and point defects gives rise to a localized increase of the BEEM current onn‐Si(111) and a decrease onp‐Si(111) in agreement with a kinematic interpretation. Onn‐Si(100), (110)‐oriented grains exhibit a Schottky barrier of 0.58±0.04 V compared to 0.74±0.04 V on (100)‐oriented CoSi2. The magnitude of the BEEM current strongly depends on the epitaxial orientation on Si(100) and is comparable for CoSi2(100)/n‐Si(100) and CoSi2/n‐Si(111).
ISSN:0734-211X
DOI:10.1116/1.587823
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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72. |
Experimental validation of a direct simulation by Monte Carlo molecular gas flow model |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1862-1866
P. K. Shufflebotham,
T. J. Bartel,
B. Berney,
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摘要:
The Sandia direct simulation Monte Carlo (DSMC) molecular/transition gas flow simulation code has significant potential as a computer‐aided design tool for the design of vacuum systems in low pressure plasma processing equipment. The purpose of this work was to verify the accuracy of this code through direct comparison to experiment. To test the DSMC model, a fully instrumented, axisymmetric vacuum test cell was constructed, and spatially resolved pressure measurements made in N2at flows from 50 to 500 sccm. In a ‘‘blind’’ test, the DSMC code was used to model the experimental conditions directly, and the results compared to the measurements. It was found that the model predicted all the experimental findings to a high degree of accuracy. Only one modeling issue was uncovered. The axisymmetric model showed localized low pressure spots along the axis next to surfaces. Although this artifact did not significantly alter the accuracy of the results, it did add noise to the axial data.
ISSN:0734-211X
DOI:10.1116/1.587825
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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73. |
Optimization of intermetal dielectric deposition module using simulation |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1867-1874
Junling Li,
James P. McVittie,
Joel Ferziger,
Krishna C. Saraswat,
Jeffrey Dong,
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摘要:
A major challenge arising in the interlevel dielectric deposition processes in modern multilevel very large scale integrated technology is the filling of high aspect‐ratio spaces without voids between metal lines. Here the main concerns are step coverage and material properties of dielectric films. One approach is the multistep silicon dioxide deposition using plasma enhanced chemical vapor deposition followed by atmospheric pressure CVD from ozone/TEOS. To combine the advantages of different processes and to satisfy the device reliability requirements, one needs to optimize the relative thickness of these sequentially deposited oxide layers. In this work a profile simulator,SPEEDIE, is employed to study this multistep process. For the PECVD process a free molecular‐flow model based on the combination of a single sticking‐coefficient LPCVD model and an ion‐induced‐deposition model is used. For the atmospheric pressure CVD (APCVD) process a continuum transport model considering both gas‐phase diffusion and surface reaction is used with a geometry‐variant reaction rate which depends on the ozone (O3) concentration. The major topography‐controlling parameters are calibrated for these sequential processes, and verified through simulation. As an example of application, a prediction of void‐forming based on the reliability requirements is generated by the simulator, and can be regarded as a measure of this multistep process. In general an efficient design tool is provided to help optimize the interlevel dielectric deposition processes.
ISSN:0734-211X
DOI:10.1116/1.587826
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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74. |
Experimental and simulation studies of thermal flow of borophosphosilicate and phosphosilicate glasses |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1875-1878
Guru Thallikar,
Hung Liao,
Timothy S. Cale,
Frank R. Myers,
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摘要:
We useEVOLVE−FLOW, a thin film thermal flow process simulator, to simulate the thermal flow of borophosphosilicate glass (BPSG) and phosphosilicate glass (PSG) thin films in trenches on patterned wafers, where two‐dimensional surface evolution is appropriate. For a fixed anneal time, two parameters control the thin film flow processes: surface tension and viscosity. We demonstrate our simulator by reproducing flowed BPSG film profiles after a 15 min furnace annealing cycle. Digitized as‐deposited BPSG film and substrate profiles from experimental scanning electron micrographs are used as initial profiles in the simulations. We then predict flowed phosphosilicate film profiles, and combine experiments and simulations to estimate the surface tension of PSG films in a rapid thermal annealing process. The viscosity of the PSG films is modeled as a function of temperature and phosphorus pentoxide concentration using an Arrhenius type equation. The estimated values of the viscosity and surface tension are used to simulate the PSG film profiles at different annealing times. The simulation results are in good agreement with experimental observations.
ISSN:0734-211X
DOI:10.1116/1.587827
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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75. |
Factory of the future: The ‘‘whole factory’’ view |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1879-1882
Sam Harrell,
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摘要:
The primary task of a semiconductor factory is to produce integrated circuits of outstanding performance at a steeply declining cost per electronic function delivered. The semiconductor industry over the next decade will need to continue to drive costs down in order to maximize manufacturing productivity in the climate of rising product complexity, equipment cost, and risk. Historically we have concentrated on aggressive yield improvement and declining wafer fab cost per cm2as the dominant factors for increasing productivity. To continue to be competitive, SEMATECH is extending its focus beyond cost per cm2to the more total view of cost per function. We are working toward a combination of solutions to meet our manufacturing challenges recognizing that no single solution will provide enough benefit to achieve the productivity gains end users expect. The ‘‘whole factory’’ view is a useful strategic planning tool for defining the future of manufacturing in the semiconductor industry.
ISSN:0734-211X
DOI:10.1116/1.587828
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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76. |
Photocatalytic oxidation for point‐of‐use abatement of volatile organic compounds in microelectronics manufacturing |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1883-1887
Gregory B. Raupp,
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摘要:
In gas–solid heterogeneous photocatalytic oxidation (PCO), volatile organic compounds (VOCs) present in process air or air vents can be rapidly and completely oxidized to innocuous by‐products over a near‐ultraviolet (UV) illuminated titanium dioxide thin film catalyst at room temperature. This class of advanced oxidation processes appears to be well‐suited for point‐of‐use VOC abatement in the microelectronics manufacturing industry. In this article, we review industrial requirements and unresolved technical issues in the context of the recently published Semiconductor Industry Association roadmap. The specific requirements for VOC abatement from a typical photolithography track are presented. Bench‐scale PCO kinetics for target VOCs are reviewed to demonstrate the typical process behavior expected.
ISSN:0734-211X
DOI:10.1116/1.587829
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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77. |
Subatmospheric chemical vapor deposition ozone/TEOS process for SiO2trench filling |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1888-1892
I. A. Shareef,
G. W. Rubloff,
M. Anderle,
W. N. Gill,
J. Cotte,
D. H. Kim,
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摘要:
Ozone/TEOS thermal chemical vapor deposition (CVD) has been investigated for SiO2deposition on Si, using a cold‐wall research reactor equipped to determine the effects of precursor concentration, deposition temperature (300–500 °C), and pressure (30–200 Torr) on deposition rates, etch rates, and step coverage in the regime of subatmospheric CVD (SACVD). Deposition rates first increase with substrate temperature then reach a maximum and finally decrease distinctly at higher temperatures, with the latter reflective of reactant depletion in the gas phase. Wet etch rates decrease at higher deposition temperature and higher ozone/TEOS ratio, indicating improved film quality under these conditions. Elevated deposition temperatures significantly improves step coverage in high‐aspect‐ratio trenches, but decreases deposition rates. Deposition rates increase and then saturate with TEOS concentration, suggesting rate‐limited behavior associated with lack of ozone.
ISSN:0734-211X
DOI:10.1116/1.587830
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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78. |
Profile modeling of high density plasma oxide etching |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1893-1899
Joseph S. Han,
James P. McVittie,
Jie Zheng,
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摘要:
The mechanisms of the oxide etching process are studied using the overhang test structures etched on the Applied Materials inductively coupled plasma oxide etcher. The results from the overhang test structures clearly show many details of the surface interactions that etched trenches would not show. Together with results obtained with standard trench structures etched with the same process, a new model for oxide etching is developed to explain the observed profiles and trends. The two neutral, simultaneous deposition and etching model contains several key features. Components controlling the deposition behavior are: (1) polymer chemical vapor deposition, (2) ion enhanced deposition, and (3) angle dependent polymer sputtering. The etch rate is simulated with a saturation model, where the rate can be ion or neutral flux limited. The model is incorporated into the profile simulatorSPEEDIEand the simulations are run with one set of parameters. The simulation results show good agreement with the scanning electron microscopy experiment results for both profile and lag trends.
ISSN:0734-211X
DOI:10.1116/1.587831
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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79. |
Development of a multitask and multiinstrument sample transfer system |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1900-1905
S. Thevuthasan,
D. R. Baer,
M. H. Englehard,
Y. Liang,
J. N. Worthington,
T. R. Howard,
J. R. Munn,
K. S. Rounds,
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摘要:
A multiinstrument, multitask UHV sample transfer system being developed for integration with a wide range of synthesis and analysis instruments is described. The specimen transfer capability allows a sample to be synthesized, processed, and characterized by several surface science techniques without exposing the sample to air. Although several types of transfer systems now exist, no existing system has the range of operation desired for a user facility which will be equipped with a wide range of vacuum and controlled atmosphere‐based techniques. Three different kinds of sample platens, which can be used in ambient, high‐temperature, and surface chemistry experiments, have been designed and tested. The temperature range of the specimen can be as high as 2000 K during heating and as low as 150 K during cooling.
ISSN:0734-211X
DOI:10.1116/1.587832
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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80. |
Long‐throw low‐pressure sputtering technology for very large‐scale integrated devices |
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Journal of Vacuum Science&Technology B: Microelectronics Processing and Phenomena,
Volume 13,
Issue 4,
1995,
Page 1906-1909
Nobuhiro Motegi,
Yuzou Kashimoto,
Koji Nagatani,
Seiichi Takahashi,
Tomoyasu Kondo,
Yasushi Mizusawa,
Izumi Nakayama,
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PDF (357KB)
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摘要:
For the next generation of semiconductor devices, new metal deposition technologies (such as Cu and Ti chemical vapor deposition) are being developed. As very large‐scale integrated fabrication becomes more highly integrated, the size of contact/via holes must shrink, producing higher aspect ratios. These geometries create major difficulties in obtaining acceptable step coverage of the barrier/glue layer within the contact/via holes. A new technology has been developed, called long‐throw sputter (LTS), for achieving acceptable step coverage particularly for geometries below 0.5 μm without employing collimators in the system. LTS (patent pending) provides more than 40% bottom coverage of barrier metal films in 0.35 μm contact holes with 3.0 aspect ratio while maintaining a high deposition rate and acceptable film uniformity. Additionally, LTS may facilitate Al alloy flow and/or reflow application.
ISSN:0734-211X
DOI:10.1116/1.587833
出版商:American Vacuum Society
年代:1995
数据来源: AIP
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