摘要:

We have studied the mechanisms that determine the density and structure of threading dislocations (TDs) in GaAs on Si by growing GaAs films on continuous Si substrates and on 10–34‐μm‐wide Si mesas that provided free‐sidewall growth. The effects of a soft ZnSe interlayer and of postgrowth annealing to 850 °C were also investigated. TD densities were accurately determined using large area plan‐view transmission electron microscopy. Burgers vector analysis of the TDs showed that threading segments associated with both sessile 90° misfit dislocations and glissile 60° misfit dislocations were present after growth. A difference in dislocation structure between the annealed and unannealed samples was observed. It was also found that the dislocations were unaffected by proximity to free sidewalls and by the ZnSe interlayer. The results indicate that dislocation interactions during the early stages of growth determine the structure and density of TDs in as‐grown films. It was also concluded that plastic relaxation of thermal mismatch strain during cooldown from the growth temperature does not strongly affect the TD density in the films. This is in contradiction to previous studies.

ISSN:0734-211X    

DOI:10.1116/1.587562

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

We experimentally compare a variety of techniques used in the growth ofp‐type Be doped AlxGa1−xAs/GaAs distributed Bragg reflector (DBR) mirrors to reduce the operating voltages of vertical‐cavity surface‐emitting lasers (VCSELs). The AlxGa1−xAs composition, average doping concentration, grading and doping profile at the interfaces, and growth temperature are all important parameters to achieve low voltage mirrors with low optical loss and high thermal conductivity. Specifically we examine band‐gap engineering techniques to flatten the voltage barrier at the DBR mirror layer interfaces. We demonstrate VCSELs with low operating voltages (1.7–3.0 V) and high continuous wave room‐temperature power‐conversion efficiencies and output powers.

ISSN:0734-211X    

DOI:10.1116/1.587563

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

An atomic layer passivation (ALP) structure for GaAs is studied by fabricating metal–insulator–semiconductor (MIS) diodes. An atomically thin GaP layer is grown on a (100) surface of GaAs to form the ALP structure. MIS diodes are fabricated on the GaP surface by depositing SiO2as the insulator. Between 1 MHz and 20 Hz, the maximum capacitances are very close to the insulator capacitance without frequency dispersion. The accumulation and inversion conditions are observed in the capacitance–voltage characteristics of the diodes at room and low temperature. The capacitance–voltage characteristics of diodes with and without ALP are compared. The results show that ALP unpins the surface Fermi level which can be displaced nearly throughout the GaAs band gap by the applied gate voltage. Interface trap density is estimated to be about 5×1011cm−2 eV−1near the midgap. The influence of the SiO2plasma deposition process on the interface characteristics is also described, and the mechanism of unpinning is discussed.

ISSN:0734-211X    

DOI:10.1116/1.587564

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

The surface oxidation of Se treated GaAs(100) has been investigated in order to understand in greater detail the degradation of the Se passivated GaAs surface upon exposure to atmosphere. An increase in band bending is initially observed at relatively low exposure times, which corresponds to an increase in the O 2pintensity in the valence band. At this stage, oxygen is thought to weakly physisorb at the Ga vacancy sites. At intermediate exposure levels, the other unadsorbed oxygen atom of O2attacks the nearest Ga atom. The bond between the nearest Ga atom and Se is then severed, resulting in the formation of Se, which closely resembles amorphous Se. Ultimately, both Se states are converted to this amorphouslike state and at longer exposure times are oxidized. At longer exposure times, the oxidation of Se is also accompanied by As oxidation. In contrast to S treated GaAs, Se/GaAs is relatively resistant to oxidation where only about 10% of the As is oxidized (As2O3) after 180 min of exposure versus oxidation of 35% of the As atoms for S/GaAs after only 20 min of atmosphere exposure. This relative oxidation resistance is attributed to greater penetration of Se into GaAs relative to S into GaAs.

ISSN:0734-211X    

DOI:10.1116/1.587483

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

The formation of SiO2/GaAs structures from reduction of substrate oxides has been studied by x‐ray photoemission spectroscopy. GaAs oxides reduction is induced by Si deposition and subsequent high‐temperature annealing. The deposition of Si on oxidized GaAs surfaces promotes the reduction of the GaAs oxides and the formation of SiO2, Si diffusion being the predominant process. This mechanism allows one to obtain SiO2thicknesses up to 15 Å. Over this limit Si diffusion is negligible, Si nucleates on top of the Si dioxide layer, and a substantial amount of GaAs oxides can remain unreduced between the SiO2layer and the GaAs substrate. Subsequent annealing to 870 K produces the disappearance of the GaAs oxides together with loss of Si atoms. A process based on breakage of the Ga–O bonds with Ga atoms remaining between SiO2and the substrate, and oxygen atoms diffusing through the SiO2to the outer surface, is consistent with the experimental results. The oxygen atoms react with the outer Si layer, showing an etchant behavior, and the Ga and As atoms supplied by their oxides recombine to form GaAs.

ISSN:0734-211X    

DOI:10.1116/1.587484

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

The electroreflectance (ER) spectra of Schottky‐barrier Ag/GaAs have been measured at various dc bias voltages (Vbias). It is known that the surface electric field can be deduced from the period of the Franz–Keldysh oscillations (FKO) of ER. Therefore, the built‐in voltage (Vbi) and the carrier concentration in the depletion region can be calculated by the assumption of a constant charge distribution in the depletion region. In this article, we show thatVbican also be determined from the amplitude of the FKO as a function ofVbiasin the forward biased region. TheVbidetermined by the above two different methods have been verified to be in good agreement.

ISSN:0734-211X    

DOI:10.1116/1.587485

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

A dead‐time‐free selective dry etching of GaAs/AlGaAs using mixed plasma of BCl3and CHF3has been developed. The selectivity of the etching for GaAs/AlGaAs is strongly dependent on the flow ratioR, whereR=(flow of CHF3)/(flow of CHF3+ flow of BCl3). It was also found that the angle of the sidewall can be varied from overhanging to tapered by controllingR. No undercutting was observed. Complete vertical recess structures with sub‐quarter micrometer width were obtained atR=40% where a selectivity of 30 was attained. The roughness of the etched surface was also strongly dependent onR. A smooth etched surface was obtained whereRwas larger than 40% even for bulk GaAs. Complete square‐shaped vertical recessed structures with sub‐quarter micrometer width were obtained in a GaAs/AlGaAs epitaxial wafer. This etching process is very applicable for the fabrication of GaAs/AlGaAs heterojunction devices such as the GaAs modulation doped field‐effect transistor and the heterojunction bipolar transistor.

ISSN:0734-211X    

DOI:10.1116/1.587486

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

Time‐dependent dielectric breakdown lifetime of 5‐nm‐thick silicon oxide films in metal–oxide semiconductors (MOSs) fabricated by a new continuous ultra‐dry process was investigated. In this process, three fundamental stages in MOS diode fabrication—oxidation, amorphous‐Si electrode film formation, and annealing to crystallize the electrode film—are continuously performed in an ultra‐dry ambient with less than 100 ppb moisture concentration (humidity). The lifetime for the continuously ultra‐dry processed MOS diodes is considerably larger than that of conventional ones produced in an ambient with more than 100–200 ppm humidity. The stress‐induced positive charges that affect lifetime are mainly generated and trapped near both oxide interfaces. This indicates that the interface condition is probably improved by the present process.

ISSN:0734-211X    

DOI:10.1116/1.587487

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

Inductively coupled plasma (ICP) sources are being developed as reactors for high plasma density (1011–1012cm−3), low‐pressure (<10–20 mTorr) etching of semiconductors and metals for microelectronics fabrication. Transformer coupled plasmas (TCPs) are one variant of ICP etching tools which use a flat spiral coil having a rectangular cross section powered at radio frequencies (rf) to produce a dense plasma in a cylindrical plasma chamber. Capacitive rf biasing of the substrate may also be used to independently control ion energies incident on the wafer. The uniformity of generating the plasma and the uniformity of the flux of reactants to the substrate are functions of the geometry and placement of the coil; and of the materials used in the construction of the chamber. In this article, we use results from a two‐dimensional model to investigate design issues in TCPs for etching. We parametrize the number of turns and locations of the coil; and material properties of the reactor. We find that at low pressure, designs which produce ionization predominantly at larger radii near the edge of the wafer produce more uniform ion fluxes to the substrate. This results from a ‘‘converging’’ ion flux which compensates for losses to lateral surfaces. Careful attention must be paid to metal structures in the vicinity of the coils which restrict the azimuthal electrical field. This situation results in reduced power deposition at large radii, which can be compensated by over sizing the coil or by using auxiliary solenoidal coils. The plasma and neutral transport, dominated by diffusion, treats the advective flow from the gas inlets and pump port as local sources and sinks which are rapidly volume averaged.

ISSN:0734-211X    

DOI:10.1116/1.587488

出版商:American Vacuum Society    

年代:1994

数据来源: AIP

摘要:

The planarization of SiO2interlevel dielectric layers by electron cyclotron resonance reactors has been modeled as the outcome of simultaneous sputter etching and plasma‐enhanced chemical vapor deposition. This combination of etching and deposition has been simulated by the repeated sequential execution of two third‐party topography evolution codes, one for each process. The simulations reproduced observed profiles and gap‐filling properties for etch/deposition ratios from 0.45 to 0.30 and also illustrated the origin of cracks in certain nonideal gaps. The influence of the width and separation of the metal lines over which deposition was simulated was also reproduced.  

ISSN:0734-211X    

DOI:10.1116/1.587489

出版商:American Vacuum Society    

年代:1994

数据来源: AIP