摘要:

An electroetching technique for maskless patterning of metals is described. The method uses the topography of the surface on which the metal is deposited to delineate the pattern during the electroetch, yielding self‐aligned metal features that are burr‐free and without undercut. Application of the technique to a one‐micron linewidth metal‐insulator‐semiconductor structure useful for insulated‐gate field effect transistors is demonstrated.

ISSN:0021-8979    

DOI:10.1063/1.336306

出版商:AIP    

年代:1985

数据来源: AIP

ISSN:0021-8979    

DOI:10.1063/1.336316

出版商:AIP    

年代:1985

数据来源: AIP