摘要:

AbstractIt is desired to reduce the area of mask PLA to save the silicon area and improve the switching speed. In the usual methods for folding, the columns and/or rows are folded with cuts. On the contrary, recently, a new folding technique has been proposed by the authors. In that technique, a variable line and its negation are folded into one line by inserting an inverter. This paper formulates that folding by using the regular ternary logic function and then clarifies its properties. An algorithm is described which generates the maximum folding. Some experimental results indicate that this algorithm is effective. It is easy to implement the algorithm on computers.

ISSN:0882-1666    

DOI:10.1002/scj.4690200401

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractThis paper describes a method which generates all elements of a Cartesian product of two sets, using the shuffle‐exchange network. Often, processing appears which requires all elements of the Cartesian product in various fields in computer science as well as set manipulations in mathematics. Consequently, this operation can be considered to be one of the most fundamental. In this paper, the Cartesian product of two sets withN/2 elements is generated by anN‐input,N/2‐stage shuffle‐exchange network by assigning the switching element to each element of the Cartesian product. The experimental derivation of the realization method and the result of the experiment are described. In the derivation of the realization method, some properties of the shuffle‐exchange network are discussed. In the realization of the Cartesian product by anN/2‐stage shuffle‐exchange network, no redundant switching element is used. Consequently, the method shown in this pap

ISSN:0882-1666    

DOI:10.1002/scj.4690200402

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractThe three‐dimensional (3‐D) integrated circuit has recently been attracting interest as a new structure for device implementation, and numerous studies are being made also from the viewpoint of the system design. This paper considers the 3‐D integrated circuit, where the layers are connected through light transmission (called 3‐D optically connected integrated circuit). It is suggested that operational processings unique to the 3‐D structure can be realized. The function is formulated algebraically as the image processing operation, and an application example to the template matching is presented. The improvement ratio of the matching processing speed by the proposed algorithm is evaluated by simulation. A discussion is made on the pipeline processing utilizing the 3‐

ISSN:0882-1666    

DOI:10.1002/scj.4690200403

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractBy the book embedding of a graph is meant a procedure to place the vertices of a graph along the spine of a book and to draw the edges in several pages, where the edges in a page should not cross each other. By the page‐number of a graph is meant the minimum number of pages needed in the book embedding. This paper discusses the page‐numbers of thed‐dimensional hypercube (CUBEd) and thed‐dimensional cube‐connected cycles (CCCd, h) with lengthh, which are considered as interesting as the processor network configuration for the parallel computer. It is already known that the upper and lower bounds of the page‐number of CUBEd(d≥1) aredandd/4, respectively. This paper shows that the page‐number of CUBEdis exactly max{d‐1, 1}, and the upper bound of the page‐number of CCCd,h(h≥3,h≥d≥1) is max{d‐ 1, 1}. The page‐number of the graph can be utilized in the evaluation of the practical realizability of the processor network graph on WSI. In other words, the result in this paper can be used as an evaluation measure for the circuit scale, when the processor network with hypercube or cube‐connected cycles to

ISSN:0882-1666    

DOI:10.1002/scj.4690200404

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractIt is desired in medicine and sport science to develop a lightweight and small‐sized measuring device which can estimate the generated force of muscle from a myo‐electric signal and monitor that signal for a long time. The purpose of this study is to develop a data compression method for the myoelectric signal. First, the myoelectric signal is full‐wave rectified and smoothed to extract the generated force (equivalent isometric tension) of the muscle. The smoothing filter was designed based on the measurements of the myoelectric signal and the force in the isometric contraction. Next, the waveform of the signal (FEMG) after a full‐wave rectification and smoothing is encoded by the adaptive delta modulation (ADM), and the result is stored in the memory. The parameters of ADM were determined in the optimal way for the myoelectric signal. FEMG signals were constructed from fast motion such as occurs in sports, usual motion such as walking, and the delay motion of a neural‐diseased patient, at sampling intervals of 24, 48 and 100 ms. The S/N ratios of ADM data were calculated as above 37, 45 and 52 dB, respectively. A portable computer (8‐bit CPU and 64‐kB memory) with the data compression program was constructed which can measure continuously the myoelectric signal of a normal subject for up to 12 hours. The decoded signal agreed well with the original FEMG, indicating the usefulness of the developed data compression method and the mea

ISSN:0882-1666    

DOI:10.1002/scj.4690200405

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractIn the usualP‐ary number digit for the addition and subtraction of two numbers (operands), 0, 1, 2, …,P‐ 1 are employed. In the minimum redundantP‐ary representation, 1 is further used, and the addition or subtraction can be performed in a constant time independent of the number of operand digits (Pϵ{2, 3, 4, …}). This paper extends this property. First, a high‐speed addition‐subtraction algorithm is discussed. It can execute the addition and subtraction ofL(ϵ {2, 3, …,P}) operands in a constant time independent ofnandL.The following property is shown as the result. Using the redundantP‐ary representation (calledK‐redundantP‐ary representation), whereK,…, 2, 1, 0, 1, 2, …,P‐lcan be used as the digit, the minimum necessary value forKisL‐ 1, and the desired algorithm can be found ifL‐1K(ϵP—1). The presented algorithm can easily be extended to an algorithm which can execute the addition and subtraction ofLoperands in a constant time independent ofn, whereLis an arbitrary number such thatP+IL.It is shown that iff(x)= [logpx]+1 ([y] is the minimum integer not less thany), the computation timeTisO(loga), where α is the minimum number of operations for the functionf( ) satisfyingf(f(f(F))))P; α increases stepwise withL. WhenPis increased,Tdecreases, and the range ofL, for whichTis constant, increases exponentially. Using the proposed algorithm, one can expect that a multi‐input high‐speed adder‐subtractor can be constructed. Various kinds of high‐speed data processings can be realized, including the multiplication

ISSN:0882-1666    

DOI:10.1002/scj.4690200406

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractThe continuing development of large‐scale and complicated computer systems has created an increasing demand for fast logic simulation which can locate errors in the logic design. The authors have devised a new scheme which makes use of memory instead of registers in controlling the pipeline system. This idea formed the basis for developing a new simulation processor, the “SP”. The SP is a system dedicated for simulation which performs parallel processing using up to 64 gate processors (GP). Using a newly devised pipeline control for each processor delivers high‐speed and inexpensive simulation. By combining processors with a high‐speed switch called ET, the degradation of processing speed due to the delay of information transmission in parallel processing can be prevented. The desired goal was achieved with the construction of the SP, a logic circuit with 4 million gates in which 32 Mbytes of memory could be simulated at h

ISSN:0882-1666    

DOI:10.1002/scj.4690200407

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractThis paper applies the dynamic programming (DP) matching to the border extraction from the dynamic echocardiogram of the heart along the short axis. The method is based on the DP matching for the two‐dimensional static image. The sampled values are stabilized by the integration by time, and the border features are emphasized by the differentiation in time. The matching is made using the spatial derivative intensity, the spatial derivative direction, and the time derivative intensity. The use of the continuity constraint along the time axis in the matching is discussed. Utilizing the property of the object that the motion is periodic within a certain range, the point of motion is determined from the sum of the time derivative over a pulsatile period, and the result is utilized in the matching constrain

ISSN:0882-1666    

DOI:10.1002/scj.4690200408

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractThe heartbeat rhythm is affected by various factors such as respiration, blood pressure, body temperature regulation, and arrhythmia. Other external factors also affect the variation of the heart‐rate with various frequency components. The heart‐rate variability (HRV) has been used as an index for the heartbeat variation, but it represents the variation caused by a large number of factors through a single measure, since it is determined from the overall time‐series of heartbeats. Consequently, it does not have a clear interpretation and can represent only macroscopic information. If an arbitrary frequency component can be extracted from the heartbeat rhythm and HRV derived based on that component, a detailed and clear information will be obtained.This paper proposes a method to extract a fluctuation component for an arbitrary frequency. The autoregressive (AR) model is applied to the time‐series of heartbeats, and the power spectrum density function is decomposed based on the characteristic equation of the AR model. HRV for arbitrary frequency component is examined. The time‐series of heartbeat is decomposed into frequency components. A time‐series is generated by simulation with the same statistical property as the decomposed component, and is analyzed to verify the effectiveness. The method is applied to the exercise ECG for analysis. As a result, the usefulness of the method was demonstrated by indicating that the information which cannot be obtained from the overall time‐series can be obtained from the generated series having only a decompo

ISSN:0882-1666    

DOI:10.1002/scj.4690200409

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY

摘要:

AbstractRecently, many studies have been reported on hardware neuron models for analyses of physiological nerve phenomena and for engineering applications of biological nerves. The ∧‐shaped transistor‐type hardware neuron model, reported by the authors earlier, simulates well the characteristics of neurons. Hence, the output pulse frequency is proportional to the input level above the threshold and the model is suitable also for engineering applications. Compared with the Hodgkin‐Huxley model which represents a phenomenal formula for the electrical phenomena of nervous excitation, however, the model reported here differs in saturation characteristics and time constants. For closer analyses of physiological nerve phenomena, a model which simulates more closely the characteristics of biological nerves is needed.This paper discusses the characteristics of sodium activation gates of nerve axon membranes and sets forth assumptions on the biological gate structure. For the discussion the authors divided the Na activation gate structure into a potential receptor and a channel gate, respective hardware models are tested with FETs, capacitors and resistors, and it was verified that the models closely simulate the electrical characteristics of the Na activation gate. Based on the results of the experiment, the following presumptions were made:1(1) membrane potential is fed to the potential receptor through a high resistance and a capacitance exists between the membrane and the outside of the axon;2(2) there are capacitances at both the open and closed positions of the potential receptor, and conductances are connected in parallel to them, thereby controlling the transition velocity by controlling transition of charged gate particles;3(3) the channel gate is comprised of two conductances corresponding to the open status and closed status, and the conductances vary depending on respective voltages which vary in response to status change of the potential r

ISSN:0882-1666    

DOI:10.1002/scj.4690200410

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1989

数据来源: WILEY