DOI:10.1049/ree.1966.0065

出版商:IERE    

年代:1966

数据来源: IET

摘要:

An X-band radar has been built with an antenna capable of rotational speeds up to 1400 rev/min, and a display system which follows at these speeds. This enables only one or two pulses per beam-width to be displayed, the pulses received from successive looks at the sea clutter being de-correlated. A conventional fluoride p.p.i. tube and a storage p.p.i. tube were used simultaneously. The resulting improvements from de-correlation and integration are demonstrated.

DOI:10.1049/ree.1966.0066

出版商:IERE    

年代:1966

数据来源: IET

摘要:

A true i.f. logarithmic amplifier is described which avoids the successive detection principle and its associated video delay line. Each stage comprises a pair of long-tailed pairs in a complementary role. Transistors are used throughout but ‘bottoming’ is avoided, and bandwidth variations are negligible. A dynamic range of about 100 dB is possible. A video output may be derived if desired from a single detector after the last stage, but when an output at i.f. is taken, phase variations with amplitude may be of interest, and have been investigated. A technique for correcting such phase variations is described, and a development of the basic amplifier circuit is given which should minimize such phase variations at their source.

DOI:10.1049/ree.1966.0068

出版商:IERE    

年代:1966

数据来源: IET

摘要:

The mechanical design of an X-band antenna suitable for rotational speeds up to 1400 rev/min is described. The microwave design and performance are briefly outlined.

DOI:10.1049/ree.1966.0069

出版商:IERE    

年代:1966

数据来源: IET

摘要:

This paper describes how a counter may be designed to follow any desired code. The method is illustrated by the design of a parallel counter operating in the 5211 binary-coded decimal mode and which uses J-K flip-flops. The modules for the complete design are available as silicon integrated circuits. The minimized input conditions for a number of other coded decade counters are also stated.

DOI:10.1049/ree.1966.0070

出版商:IERE    

年代:1966

数据来源: IET

摘要:

Techniques in current use for the reception of the B.B.C.-2 programme at u.h.f. are illustrated, with reference to operational unmanned remote site installations. At u.h.f. an engineered receiving site can be designed for 20 dB better signal/noise ratio than is practicable and economic on domestic television installations

DOI:10.1049/ree.1966.0071

出版商:IERE    

年代:1966

数据来源: IET

DOI:10.1049/ree.1966.0072

出版商:IERE    

年代:1966

数据来源: IET

摘要:

Special purpose digital apparatus is described for off-line correlation of time varying functions in analogue form. The necessary storage, repetition and relative scanning are afforded by an instrumentation magnetic tape recorder through the extension of its ‘closed loop’. A new value of lag coincides with the complete replacement of that length of tape contained within the ‘closed loop’, and a fresh value of correlation coefficient is printed out for each lag. The method takes up only two tracks, so hose remaining can be used in the normal acquisition role at any convenient speed, later transferring their signals at high speed to the analysis circuits.

DOI:10.1049/ree.1966.0073

出版商:IERE    

年代:1966

数据来源: IET

摘要:

The paper describes the construction and performance of a microwave, spaced-cavity refractometer designed for the measurement of the small-scale variations of refractive index in the lower atmosphere. The instrument has been used on a captive balloon at heights up to 2–5 km with telemetry equipment transmitting, to a ground station, information on variations in refractive index, temperature, wind speed and pressure.

DOI:10.1049/ree.1966.0074

出版商:IERE    

年代:1966

数据来源: IET

摘要:

The paper describes an improved form of saturated transistor logic circuit in which rectifier diodes are used to provide non-linear current feedback from collector to base of the transistor. The resulting arrangement has many advantages over the basic saturated circuit, particularly with respect to speed and logical versatility. Due to the ability of the circuit to handle two levels of logic in each stage, mean delays approaching 1 ns per logical decision can be obtained using non-selected components.

DOI:10.1049/ree.1966.0075

出版商:IERE    

年代:1966

数据来源: IET