摘要:

The results of a low temperature 5.5 K photoluminescence study on undopedn‐type InxGa1−xAs(0.51

ISSN:1071-1023    

DOI:10.1116/1.582952

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

ZnSe layers (1–2 μm thick) have been grown by molecular beam epitaxy on both (111) and (100) oriented ZnSe substrates. The layers were grown on atomically clean, single‐crystalline ZnSe surfaces preparedinsituby an Argon‐ion sputtering/annealing process. Homoepitaxial ZnSe layers grown on (111) ZnSe exhibited microtwinning as indicated by reflection high energy electron diffraction (RHEED) observations together with zero detectable excitonic photoluminescence emission. In contrast, layers grown on (100) ZnSe had smooth surfaces, indicated by a streaky RHEED pattern, and exhibited strong 4.2 K excitonic emission at 2.7980 eV (I0α). This can be contrasted with the Ga‐bound excitonic emission at 2.7972 eV (IGa20) observed from layers grown on (100) GaAs substrates.

ISSN:1071-1023    

DOI:10.1116/1.582953

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

A scheme for classifying the interfacial reactivity of metal–compound semiconductor systems is presented. The scheme uses a simple bulk model to calculate a ‘‘heat of reaction,’’ which includes the effects of metal–semiconductor anion compound formation and metal–semiconductor cation alloying. The scheme is applied to the layered semiconductors GaSe and MoS2, III–V semiconductor InP, and the II–VI semiconductor CdTe, for a wide range of metals. The resulting classification compares favorably with published experimental data on ultrahigh vacuum cleaved surfaces. For the majority of these interfaces, the reactivity classification is the same as that obtained by considering only metal–semiconductor anion compound formation. However, for the combinations Au–InP, Ni–CdTe, Ni–GaSe, Cu–CdTe, and Cu–GaSe, it is only by including alloying that the combination is classified as reactive, in agreement with experimental data.

ISSN:1071-1023    

DOI:10.1116/1.582954

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

Replacing aluminum with tungsten silicide in Al/SiO2/Al/Si double‐metal systems reduced hillock formation and allowed the reflow of glass for better second‐metal topography. The high contact resistance of tungsten silicide ton+‐Si and poly‐Si was reduced by implanting the tungsten silicide with phosphorus or arsenic. Charge‐coupled‐device (CCD) imagers were fabricated by this technique.

ISSN:1071-1023    

DOI:10.1116/1.582955

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

Reactive ion beam etching yield for lightly doped Si(100) using Cl2gas in the ion source was measured as a function of current density and angle of incidence. Experiments were performed such that the ion flux delivered to the sample was held constant at each angle. At normal ion incidence etching yield decreased linearly with current density. With constant ion flux to the sample surface the yield remained constant from 0° to 70° angle of incidence.

ISSN:1071-1023    

DOI:10.1116/1.582956

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

This paper reviews recent progress towards integrating the self‐aligned titanium silicide process into VLSI NMOS and CMOS technologies, to simultaneously reduce the gate and junction sheet resistances to below 1 Ω/sq. In addition to reviewing the base line self‐aligned TiSi2process, the key issues that must be addressed if the process is going to be successfully integrated into a VLSI process flow, without having adverse effects on device parameters, will be discussed. Such issues are how the sheet resistance can be reduced to<1 Ω/sq without bridging between the gate and source/drain regions, the effect of silicide stress on gate oxide integrity, and how bothP‐ andN‐type junctions can be silicided without adversely affecting diode or transistor properties. Recent results on the hot electron hardness of silicided devices compared to unsilicided transistors will also be presented. The implementation of the self‐aligned titanium silicide process using rapid thermal processing to simultaneously fabricate transistor gates and junctions with a sheet resistance of 1 Ω/sq will also be described. Using the self‐aligned TiSi2technology, fully functional VLSI CMOS and NMOS circuits of the 64K static random access memory class of complexity, with 1 μm gates, have been fabricated with yield that is similar to unsilicided parts.

ISSN:1071-1023    

DOI:10.1116/1.582957

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

Impurity profiles in arsenic implanted chemical vapor deposition (CVD) tungsten silicide (WSix) have been studied. Arsenic was implanted in WSi2.6layer deposited on silicon substrates, and impurity profile measurements were performed by Rutherford backscattering spectrometry (RBS) techniques. Observed profiles in the as‐deposited silicide can be fitted well with calculated Gaussian distribution. Carrier concentration profile measurements of silicon substrates indicate that tailing of the profile due to a channeling did not occur. Therefore, a sufficient masking effect has been achieved by this layer for use in a self‐aligned gate implantation process. When annealing was done, the dissolution of excess silicon occurred from the nonstoichiometry silicide. Arsenic ion implanted into the silicide diffused into the silicon substrate. As a result, deeper junctions with a lower surface concentration is formed by furnace annealing. However, shallow junctions were formed by rapid thermal annealing (RTA).

ISSN:1071-1023    

DOI:10.1116/1.582958

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

Capacitance–voltage carrier concentration profiling has been used to investigate the high temperature stability of refractory metal silicide films on GaAs. This technique is more sensitive to silicide–semiconductor interactions than is forwardI–Vcharacterization since tenacious surface Fermi level pinning of GaAs can yield stable diode barrier height and ideality factor measurements even for some cases of gross silicide–semiconductor interaction. UsingC–Vcharacterization we have found tungsten silicide film compositions that exhibit excellent high temperature stability on GaAs and have suggested failure mechanisms for other less stable film compositions.

ISSN:1071-1023    

DOI:10.1116/1.582960

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

A refractory metal silicide process has been developed for the fabrication of self‐aligned gate (Al,Ga)As/GaAs FET’s (MODFET’s). Completely planar, self‐aligned gate by ion implantation MODFET’s have been fabricated and have demonstrated typical transconductances of 180–200 mS/mm at room temperature and over 300 mS/mm at 77 K. Self‐aligned gate ring oscillator test circuits have demonstrated gate propagation delays as low as 17.6 ps/gate at 2.65 mW/gate at room temperature.

ISSN:1071-1023    

DOI:10.1116/1.582961

出版商:American Vacuum Society    

年代:1985

数据来源: AIP

摘要:

A pure metal (molybdenum) polycide MOS gate with a trilevel gate structure (Mo/thin MoSix/polysilicon) has been studied and different MoSixthicknesses ranging from 0 to 40 nm were examined. Even at high temperatures there is no interfacial reaction between the Mo and polysilicon nor any deterioration of the dielectric strength of MOS capacitors when this trilevel gate structure is used with an inter‐MoSixlayer thickness of around 15 nm. This MOS structure offers stable MOS characteristics and low resistive molybdenum interconnections in VLSI process technology.

ISSN:1071-1023    

DOI:10.1116/1.582962

出版商:American Vacuum Society    

年代:1985

数据来源: AIP