摘要:

A process compatible with very large scale integrated technology for preparing high densities (up to500 μm−2) of well-passivated sub-5 nm diam silicon nanowires is presented. The nanowire formation consists of the deposition of a fine-grained natural mask and the subsequent transfer of the pattern into the silicon substrate by reactive ion etching. To isolate the nanowires from the bulk and from each other, this process was applied on silicon-on-insulator material, where the buried oxide layer acts as an etch stop. The nanowire diameter distribution was then shifted below 5 nm by self-limiting oxidation. Finally, hydrogen-rich amorphous silicon nitride(a-SiNx:H),prepared by plasma enhanced chemical vapor deposition, was deposited onto the structures to act as a source of hydrogen. After annealing in forming gas, visible photoluminescence (PL) is detected under 325 nm excitation. Thea-SiNx:Hwas found to emit broad PL, where peak position and intensity depend on the layer composition. Buried silicon oxide, covered bya-SiNx:Hand annealed in forming gas emits yellow (480 nm), blue (560 nm), and red (650 nm) PL. After subtraction of the PL originating from both silicon oxide and silicon nitride, no light could be attributed to the nanowires, possibly due to insufficient passivation of the wires.

ISSN:1071-1023    

DOI:10.1116/1.589867

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

To develop methods for the formation of metal-insulator-semiconductor (MIS) devices at low temperature, thinSiO2,SiOXNY,andSiNXfilms were reactively sputtered onto nonheated silicon substrates using different sputtering and ion assist parameters.SiO2was prepared by bombarding Si withAr+ions inAr/O2ambient whereasSiOXNYandSiNXfilms were prepared by bombardingSi3N4withN2+ions inN2/O2andAr/N2ambients, respectively. In addition, 300 eVN2+ion assistance was used during preparation ofSiNXfilms to enhance film nitriding. The 100–300 eVAr+ion assistance was also used during preparation ofSiO2to investigate the electrical damage effects caused by energetic ion bombardment during sputtering of the insulator film. The bulk and interfacial electrical properties of these films, which were assessed from current–voltage and high-frequency capacitance–voltage(C–V)measurements on MIS structures, indicate that the Si native oxide and type of anneal play a key role in determining the final film-interface quality.SiOXNYsputtered films exhibit poorerC–Velectrical characteristics with increasing nitrogen content resulting from the creation of positive fixed charge in the film and fast interfacial states. This damage can be suppressed using a native oxide but this increases the instability of the interface. Ion assistance ofSiO2films increased the level of electrical damage to the film in the bulk and in the vicinity of the interface. The majority of this damage manifests itself as fixed charge and trapping states in the film rather than fast interfacial states and leads to lower breakdown voltages and higher dielectric constants. Drift behavior of these films suggest that, with a native oxide in place, the former type of ion bombardment induced damage can be eliminated by a forming gas anneal although some deterioration of the electrical bulk properties remains.

ISSN:1071-1023    

DOI:10.1116/1.589868

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

Two different roughening mechanisms are studied using a production-ready epitaxial deposition system to grow various epilayers, including the base layer of bipolar transistors. Surface roughness is measured using atomic force microscopy and transmission electron microscopy is used for cross-sectional analysis. Very smooth surfaces are routinely obtained, with a root mean square roughness of 0.15 nm. However, two possible mechanisms are shown to increase surface roughness under certain conditions. Above a certain critical thickness, for growth temperatures higher than 525 °C and Ge compositions above 25%, strain redistribution results in surface ripples with a typical wavelength of the order of 100 nm. In addition, we find that substrate contamination (C,O) can produce wide depressions, several hundreds of nm wide and on average 10 nm deep in Si epilayers. The addition of a small concentration of Ge (below 15%) seems to produce more planar growth compared to the same thickness (50 nm) of Si only. The origin of the different surface morphologies observed is discussed.

ISSN:1071-1023    

DOI:10.1116/1.589869

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

The application of corona discharge during the thermal oxidation of Si substrates has been shown to dramatically enhance the growth rate at low temperatures. Fourier transform infrared spectroscopy (FTIR) of the films shows that these films have properties close to those of untreated oxides. No-hydrogen related impurities are introduced into these films by the corona processing. However, subtle changes in the shape and intensity of the main Si–O–Si asymmetric (AS) stretch vibration at1070 cm−1indicate that the films have a different structure than that of standard thermalSiO2films. The changes in frequency and full width half maximum (FWHM) of the AS peak are described as a function of corona-treatment parameters. The peak frequency and FWHM of positive-corona-treated films shift in a direction consistent with relaxation of thermalSiO2films. However, for negative-corona-treated films the shifts are in the opposite (unexpected) direction. Coupled FTIR and etch-back measurements indicate that both positive- and negative-coronaprocessed films are homogeneous.

ISSN:1071-1023    

DOI:10.1116/1.589870

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

Temperature control during rapid thermal processing continues to be subjected to pressures for improved reliability by advanced semiconductor device manufacturing requirements. A very simple, inexpensive, and compact temperature sensor, based on the temperature dependence of the reflectivity of materials, has been developed here at IBM. While this sensor is directly applicable to metals, semiconductors, and insulators, we emphasize here only application to silicon, for which the optical reflectance thermometer (ORT) is continuously applicable from well below room temperatures to the melting point with a response time of less than 1 ms. The operation of this thermometer is demonstrated in a conventional rapid thermal anneal (RTA) chamber. When the RTA temperature cycle is controlled by the ORT, repeatability of±3 °Cis routinely obtained for steady-state dwell times as short as 0.4 s at 987 °C and slew rates as high as 445 °C/s. The actual sample temperature is continuously recorded as a function of time.

ISSN:1071-1023    

DOI:10.1116/1.589871

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

In this article, we have studied the role of photoeffects in the formation of aluminum back surface field (BSF) contacts onp-type silicon wafers by using different lamp configurations in rapid thermal processing (RTP). Use of photons of wavelengths less than 800 nm in conjunction with infrared and visible photons in RTP resulted in the reduction of processing time from 202 to 138 s and the processing temperature from 890 to 850 °C. The reduction in the overall thermal budget used for BSF contact formation is a direct result of photon assisted RTP. The availability of a large number of high energy photons on the metal surface also resulted in improved electrical, structural and mechanical properties of the processed device.

ISSN:1071-1023    

DOI:10.1116/1.589872

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

We have studied by atomic force microscopy (AFM) the surface morphology of SiO2layers grown by thermal oxidation of silicon wafers implanted with As, B, Ge, or Si ions. In order to grow oxides having comparable thickness at different temperatures, we have employed both dry and wet processes. Roughness values up to 0.4 nm have been measured on the surface of these oxides. Surface morphology is not influenced by the oxidation ambient, while temperature-related effects are predominant. For low temperature oxidation (920 °C), the predominating effects are due to the behavior of the implanted species, and mainly consist in segregation phenomena, that are the result of a complex competition among different factors, including the segregation coefficient, the relative diffusion rates in the oxide and silicon, and the oxidation rate. At higher temperature (1100 °C), impurity segregation is inhibited or considerably reduced by the increased diffusivity, and defects formation, due to the evolution of the radiation damage, becomes the main effect. Finally, the comparison among AFM, Rutherford backscattering spectrometry, and transmission electron microscopy data has allowed to demonstrate that the morphologies of the SiO2surfaces are tightly related to the corresponding SiO2/Si interfaces.

ISSN:1071-1023    

DOI:10.1116/1.590298

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

The latest evolution in complementary metal–oxide–semiconductor technology has made the metal–oxide–semiconductor field effect transistor (MOSFET) a viable choice for rf applications, especially for frequencies in the low GHz region. However, hot-carrier effects should also be considered carefully when the devices are operating in the GHz regime. Here, we studied the effects of dc hot-carrier stress on lightly doped drain (LDD)n-type MOSFET (NMOSFET) high frequency performance by measuring and simulating itssparameters. This is the first time, to the author’s best knowledge, that such experiments are reported. We demonstrated clearly the effects of hot-carrier stressing on LDD NMOSFETs by giving representativesparameter and noise measurement results from a 0.8 μm long device. We showed that hot-carrier stress can significantly degrade bothsparameters and noise of NMOSFETs, and thus can have considerable consequences for circuit designers. Therefore, these effects should be carefully considered when using MOSFETs in high frequency analog circuits. Unfortunately, both MEDICI and SPICE simulation could not satisfactorily model the LDD MOS structure after hot-carrier stress. Various results indicated that the current MEDICI platform is not very consistent for ac simulation, although dc simulation is very good. SPICE simulation showed very promising results when modeling the changes in S12 and S21 due to hot-carrier stress, yet the results for S11 and S22 were not very good. This deficiency implies that a better small-signal model for LDD MOS structures would be necessary for SPICE to be useful in modeling hot-carrier effects on MOSFET high frequency performance.

ISSN:1071-1023    

DOI:10.1116/1.589873

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

We report a study of a fundamental limit to the accuracy of vertical measurements made using scanning-probe microscopes (SPM): the short-term stability of a vertical calibration using a waffle-pattern artifact. To test the instrumental component of this stability, we acquired three data series, at different humidity levels. We compare the variations in waffle-pattern depth in these three data series with the differences in depth estimates using several different analysis methods. The three methods tested are: a histogram method, the scanning-probe image processor, and the polynomial step-function fit. To clarify the importance of the analysis method, a discussion of the different leveling, averaging, and depth-estimation aspects of the various methods is presented. To understand the true repeatability limit of SPM calibration, it is necessary to treat imaging artifacts such as tilt, nonlinearities, and image bow carefully. We find that, when such care is taken, the dependence of the average waffle-cell depth on algorithm is around 0.1%. This is less than the standard deviation of the step-height estimates of around 0.5%, which may be attributed to short-term instrumental variations in vertical SPM calibration. This is a far better stability than the 5%–10% variations observed under long-term aging of the piezo scanner. However, the histogram algorithm, which does not correct image bow, gives an average waffle-cell depth estimate which is nearly 1% higher than the others, indicating that careful image analysis is necessary if the measurement accuracy is to be comparable to the short-term stability of the piezo scanner.

ISSN:1071-1023    

DOI:10.1116/1.589933

出版商:American Vacuum Society    

年代:1998

数据来源: AIP

摘要:

The surface structure of 0.8 monolayers (ML) Ga on an Si (001) 2×1 surface has been studied with scanning tunneling microscopy (STM). Periodical clusters, aligned in〈110〉directions on an Si (001) surface and reflecting the polarity of terraces on that surface, were observed. The clusters of Ga consist of the 8×5 phase. From the line profiles of the clusters in STM images, each cluster of the 8×5 phase has been found to consist of Ga double layers, the top layer of Ga being composed of four Ga atoms. Clusters in contiguous arrays are out of phase in the direction of the arrays. Pairs of two Ga atoms exist in both longitudinal sides at each cluster along the contiguous arrays. These pairs of two Ga atoms at both sides of the valleys between the contiguous arrays are located alternatively. From the above information on positions of Ga atoms, arrangements of Ga atoms of the clusters of the 8×5 phase are presumed. Two cases are considered for the arrangements of the clusters based on the arrangements of Si atoms on the top and second layers of Si (001). It is concluded that the lateral direction of clusters is parallel to the rows of the top and second layers of Si (001).

ISSN:1071-1023    

DOI:10.1116/1.589874

出版商:American Vacuum Society    

年代:1998

数据来源: AIP