摘要:

Distributed computer control systems (DCCS) have a number of potential advantages over centralised systems, especially where the application is itself physically distributed. A computer station can be placed close to the plant being controlled, and a communications network used to enable the stations to communicate to co-ordinate their actions. However, the software must be carefully designed to exploit the potential advantages of distribution. In the paper, the CONIC architecture for DCCS is described, concentrating on the software structure but also briefly describing the physical architecture designed to support a CONIC system. The software structure emphasises the distinction between the writing of individual software components and the construction and configuration of a system from a set of components. A modular structure is used to separate programming from configuration. Typed entry and exit ports clearly define a module interface which, like the plugs and sockets of hardware components, permit modules to be interconnected in different ways. On-line modification and extension of the system is supported by permitting the dynamic creation and interconnection of modules. Message-passing primitives are provided to permit modules to co-ordinate and synchronise control actions.

DOI:10.1049/ip-e.1983.0001

出版商:IEE    

年代:1983

数据来源: IET

摘要:

Two techniques are described for sequentially adapting a finite impulse response digital filter which is constructed as a cascade of 2nd-order sections. It is shown that the radius and angle co-ordinates of each zero pair may be separately adapted. The first method uses a modified LMS algorithm, while the second, by employing prequantised coefficients, avoids the need for a control parameter. The performance, when used for linear prediction of speech, is discussed.

DOI:10.1049/ip-e.1983.0002

出版商:IEE    

年代:1983

数据来源: IET

摘要:

In the data-flow model of computation instruction, execution is determined by the availability of data rather than by an explicit or implicit sequential flow of control. One of the major problems in the architectural design of a data-flow computer is the detection of the availability of data. This problem is compounded if the data carry context information as well as pointers to the instructions that will use them; an instruction is then executable when all data directed to it within the same context are present. The solution adopted in the Manchester design is to limit the maximum number of operands of an instruction to two, and to use associative storage techniques to detect the presence of data. The use of true content addressable memory is precluded by its small density and high cost, and therefore a pseudo-associative store using hardware hashing techniques and implemented with conventional random-access memory is employed. The concept of sequence in the data-flow model of computation is unimportant; as a result search operations do not have to be resolved in the same sequence that the store is interrogated. This suggests a design which uses a main parallel hash table and a separate overflow mechanism operating in parallel. In this manner, an overflow search need not halt the progress of further main hash table searches. A pseudo-associative store results whose average access time is very close to the cycle time of the original randon-access memory.

DOI:10.1049/ip-e.1983.0004

出版商:IEE    

年代:1983

数据来源: IET

摘要:

A description is given of the development environment currently being used to aid the design and test of applications software for a distributed multiprocessor computer system. The multiprocessor system is constructed from a set of standard commercially available hardware components and is suitable for investigating a range of real-time distributed computing applications. The design of the various software components required for use with the adopted methodology are described, together with a description of the facilities provided by a laboratory development facility currently being used.

DOI:10.1049/ip-e.1983.0006

出版商:IEE    

年代:1983

数据来源: IET

摘要:

The advent of IC technology has resulted in the fabrication of IC threshold gates which are competitive, both in performance and cost with standard logic packages. Of them, the multioutput digital summation threshold-logic (DSTL) gate is considered to be a potential candidate of future interest. In this paper, an algorithm has been developed to realise nonthreshold functions utilising the multioutput capability of DSTL gates. In this context, optimal realisation has been discussed. An universal logic module (ULM) has been proposed, based on DSTL approach, and an optimised structure of ULM for 4-variable functions is suggested.

DOI:10.1049/ip-e.1983.0007

出版商:IEE    

年代:1983

数据来源: IET