摘要:

The author argues the case for closer ties between the computing and control disciplines, using illustrations drawn from products in everyday use, and from a brief examination of automated manufacturing. The link between market requirements and trends in electronics manufacture is discussed. Some topics are advanced for further consideration.

DOI:10.1049/ip-e.1985.0001

出版商:IEE    

年代:1985

数据来源: IET

摘要:

The paper addresses two problems associated with the design of large-scale logic controllers. The first problem is concerned with the difficulty in comprehending logic-controller design specifications which are traditionally based on low-level design description languages. The second problem is concerned with the difficulty of designing high-speed programmable logic controllers which are usually based on the sequential scanning of the logic controller algorithm. An integrated solution to these two problems is developed. The Halstead metrics are described and adapted for evaluating the complexity of a design in terms of the properties of the design language. A decomposition methodology for structuring the design of the logic controller as a hierarchy of functional units is developed. The decomposition allows a relatively high level of functional description of a logic controller design through the use of abstraction. The effects of abstraction and decomposition on the complexity of a design specification is illustrated with an example. The hierarchy of functional units provide efficient building blocks for the low-complexity design of programmable logic controllers, which exploit hardware parallelism to achieve better performance.

DOI:10.1049/ip-e.1985.0002

出版商:IEE    

年代:1985

数据来源: IET

摘要:

A design methodology for self-timed VLSI systems is proposed. This includes a language for describing algorithmic behaviour which is based on the data-flow concept. A subclass of Petri nets is introduced to model the designed system, and a refinement technique is presented that allows for the synthesis of correct-by-construction systems. Finally, a systematic means for implementing the design is given.

DOI:10.1049/ip-e.1985.0003

出版商:IEE    

年代:1985

数据来源: IET

摘要:

This paper deals with inner and direct matrix-multiplication methods for the matrices of the following orders: 4 × 4 by 4 × 4 or 1 × 4 (vector) by 4 × 4. Those matrix-multiplication methods are used when modelling the scenes in computer graphics. The matrices are multiplied when the corresponding elements are multiplied simultaneously. In contrast to the standard matrix-multiplication method, some shifting methods are used in order to speed up the process of multiplication. Those mapping matrix-multiplication methods applied to an array of processors have some particular interconnection patterns which are only valid for the near-neighbour 2D and 3D connections. Hardware and software structures are presented in the paper.

DOI:10.1049/ip-e.1985.0004

出版商:IEE    

年代:1985

数据来源: IET

摘要:

A new switching technique called ‘virtual cut-through’ has been recently proposed for computer communication networks. The paper presents the analysis of ‘virtual cut-through’ for multipacket messages. Also introduced is a modified virtual cut-through switching technique that allows partial cuts. The performance analysis of partial cuts is presented. Partial cuts have been shown to be more advantageous from the practical point of view. It has been observed, from the analytical results in the paper, that the use of partial cuts gives an assisting hand to boost the performance of a network exactly when it is badly needed, i.e. when the value of line utilisation lies between 0.4 and 0.8. Various performance curves that provide deep insight and better understanding of the behaviour of this switching technique are also given.

DOI:10.1049/ip-e.1985.0005

出版商:IEE    

年代:1985

数据来源: IET