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1. |
Quasi cut-through: New hybrid switching technique for computer communication networks |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 131,
Issue 1,
1984,
Page 1-9
M.Ilyas,
H.T.Mouftah,
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摘要:
A novel hybrid switching technique for computer networks is proposed and analysed in this paper. This hybrid switching technique combines packet switching and cut-through switching. Partial cuts are introduced to improve the performance of a network from a practical point of view. Messages are segmented into packets using a threshold-based segmentation rule. A method to calculate reassembly delay for noisy channels is described and has been used in the analysis of the hybrid switching. Several numerical results are reported at the end which depict the practical versatility of the proposed hybrid switching. Some simulation results are also reported in order to verify the analytical formulation.
DOI:10.1049/ip-e.1984.0001
出版商:IEE
年代:1984
数据来源: IET
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2. |
Approach to the hardware implementation of digital signal processors using mersenne number transforms |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 131,
Issue 1,
1984,
Page 10-18
W.C.Siu,
A.G.Constantinides,
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PDF (1104KB)
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摘要:
In this paper Mersenne number transforms are converted into cyclic convolutions, in which form they are amendable to simple hardware interpretation. Such realisation structures are proposed that can make the computation of Mersenne number transforms very fast indeed. This new approach can be extended to the implementation of other number theoretic transforms, in particular to Fermat number transforms, and is also applicable to the fast implementation of discrete Fourier transforms.
DOI:10.1049/ip-e.1984.0002
出版商:IEE
年代:1984
数据来源: IET
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3. |
Pattern recognition for automated wire bonding |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 131,
Issue 1,
1984,
Page 19-30
H.F.Li,
C.M.Tsang,
Y.S.Cheung,
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PDF (1977KB)
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摘要:
The design and development of an integrated pattern-recognition system for transistor/LED wire bonding is presented. The system uses a M6809 microprocessor for computation. Three recognition algorithms are studied extensively, and their relative performances are compared. The first algorithm based on edge extraction and projection is relatively slow but is a candidate for hardware implementation at higher speeds. The second algorithm based on the Freeman tracer is the fastest, but not intelligent enough to identify connected regions. A new algorithm called the ‘connected-tracer’ algorithm is proposed, which solves the problem of simple connectiveness with a speed performance of around 0.1 s using a 1 MHz processor. A variety of die samples of different sizes, scribing and attachment methods are tested. The results indicate that the system developed is both reliable and effective for fully automated transistor/LED wire bonding
DOI:10.1049/ip-e.1984.0004
出版商:IEE
年代:1984
数据来源: IET
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4. |
Reliability analysis of hybrid redundancy systems |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 131,
Issue 1,
1984,
Page 31-36
I.Koren,
E.Shalev,
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PDF (698KB)
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摘要:
The paper presents a new approach to the reliability evaluation of redundant systems. The exact logic design of the switches is analysed in order to distinguish between fatal and nonfatal faults in the switching logic. System unreliability is then calculated by summing the probabilities that unrecoverable faults occur. In addition to the more accurate reliability evaluation achieved by the new approach, it is also useful for comparing various designs of the switching logic or different switching strategies.
DOI:10.1049/ip-e.1984.0005
出版商:IEE
年代:1984
数据来源: IET
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