Programmable variable-rate up/down counter for generating binary logarithms
作者:
H.Y.Lo,
J.H.Lu,
Y.Aoki,
期刊:
IEE Proceedings E (Computers and Digital Techniques)
(IET Available online 1984)
卷期:
Volume 131,
issue 4
页码: 125-131
年代: 1984
DOI:10.1049/ip-e.1984.0023
出版商: IEE
数据来源: IET
摘要:
The design of an algorithm for a programmable variable-rate counter for generating precise binary logarithmic functions is presented. The error in log2(l + x), as defined by Iog2(l + x) − x, may be considered as a set of straight lines whose slopes, either positive or negative, are chosen to be integral multiples of a binary fraction. By using a programmable counter whose rate is proportional to the slope of the line segments, the error is corrected. The circuitry is simple because no add operation is needed. The precision of the answer depends upon the number of bits used. In addition, an algorithm to synthesise the variable-rate up/down counter (VRU/DC), thus reducing the number of calculations, is given. It pinpoints the break points for this design, and also specifies the range covered by the segment for optimal precision. The algorithm can also be used to generate the antilogarithm.
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