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Pseudo-associative store with hardware hashing

 

作者: J.G.D.da Silva,   I.Watson,  

 

期刊: IEE Proceedings E (Computers and Digital Techniques)  (IET Available online 1983)
卷期: Volume 130, issue 1  

页码: 19-24

 

年代: 1983

 

DOI:10.1049/ip-e.1983.0004

 

出版商: IEE

 

数据来源: IET

 

摘要:

In the data-flow model of computation instruction, execution is determined by the availability of data rather than by an explicit or implicit sequential flow of control. One of the major problems in the architectural design of a data-flow computer is the detection of the availability of data. This problem is compounded if the data carry context information as well as pointers to the instructions that will use them; an instruction is then executable when all data directed to it within the same context are present. The solution adopted in the Manchester design is to limit the maximum number of operands of an instruction to two, and to use associative storage techniques to detect the presence of data. The use of true content addressable memory is precluded by its small density and high cost, and therefore a pseudo-associative store using hardware hashing techniques and implemented with conventional random-access memory is employed. The concept of sequence in the data-flow model of computation is unimportant; as a result search operations do not have to be resolved in the same sequence that the store is interrogated. This suggests a design which uses a main parallel hash table and a separate overflow mechanism operating in parallel. In this manner, an overflow search need not halt the progress of further main hash table searches. A pseudo-associative store results whose average access time is very close to the cycle time of the original randon-access memory.

 

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