Design methodology for self-timed VLSI systems
作者:
P.F.Lister,
A.M.Alhelwani,
期刊:
IEE Proceedings E (Computers and Digital Techniques)
(IET Available online 1985)
卷期:
Volume 132,
issue 1
页码: 25-32
年代: 1985
DOI:10.1049/ip-e.1985.0003
出版商: IEE
数据来源: IET
摘要:
A design methodology for self-timed VLSI systems is proposed. This includes a language for describing algorithmic behaviour which is based on the data-flow concept. A subclass of Petri nets is introduced to model the designed system, and a refinement technique is presented that allows for the synthesis of correct-by-construction systems. Finally, a systematic means for implementing the design is given.
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