We discuss two aspects of recent work at NREL related to thin‐layer crystalline silicon for photovoltaic (PV) use. One is our attainment of procedures for controlled float‐zone (FZ) growth, wafering, and double‐side polishing of high‐purity multicrystalline silicon with a range of grain sizes (about 0.1–1.0 mm) and wafer thicknesses (40–350 &mgr;m). These procedures will be used to study grain size/thickness/solar cell performance relationships. The other aspect is growth of thin (5–50 &mgr;m) silicon layers from −950 °C copper solution on (111) single‐crystal silicon substrates for studying variations in growth properties and characteristics of the thin Si layers.