Rising test generation costs, compounded by the problem of module inaccessibility, have led to a surge of interest in self-testing methods for p.l.a.s. This paper considers the problems associated with the on-chip testing of p.l.a.s deeply embedded in v.l.s.i. systems and presents a method of on-chip testing which uses the input/output registers of the p.l.a. as test aids. An 8-input ×45 product term ×6-output built-in testable p.l.a., which has been implemented in n.m.o.s., is described.