A grain‐boundary trapping model, which modifies the trapping theories Proposed by Seto and Baccarani et al., is proposed to explain the electrical transport properties of polycrystalline silicon films. The trapping capability of grain‐boundary traps, the average carrier concentration, and the width of depleted‐layer in the space‐charge region have been carefully considered and so the theory can be applied to polycrystalline silicon films of both small and large grain‐size. When three sets of experimental data with different grain sizes are compared to the theoretical curves, a good agreement is obtained.