Clock-controlled shift registers in binary sequence generators
作者:
W.G.Chambers,
期刊:
IEE Proceedings E (Computers and Digital Techniques)
(IET Available online 1988)
卷期:
Volume 135,
issue 1
页码: 17-24
年代: 1988
DOI:10.1049/ip-e.1988.0003
出版商: IEE
数据来源: IET
摘要:
Cryptographic binary sequence generators are discussed in which a linear feedback shift register is clock controlled in a pseudorandom manner by another register. Huge values of the linear equivalence are readily achieved. To illustrate the possibilities three types of generator are described: First, the output from a clockcontrolled shift register is scrambled by a MacLaren-Marsaglia shuffler. Secondly, the output sequence is generated as the scalar product of the state-vector of a clock-controlled shift register with a pseudorandom sequence of vectors and thirdly, a cascade of clock-controlled shift registers is set up in which several bits are passed in parallel from stage to stage through invertibles-boxes. A new version of the theorem which guarantees large values of the linear equivalence is given, together with a proof along novel lines.
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