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Economic approach to fault-tolerant synchronisation

 

作者: A.H.Infis,   W.R.Moore,  

 

期刊: IEE Proceedings E (Computers and Digital Techniques)  (IET Available online 1988)
卷期: Volume 135, issue 2  

页码: 82-86

 

年代: 1988

 

DOI:10.1049/ip-e.1988.0012

 

出版商: IEE

 

数据来源: IET

 

摘要:

Previous solutions to the problem of synchronising fault-tolerant multiprocessor systems require either 3t+1 processors (fort-fault- tolerance) or else multiple rounds of messages with unforgeable digital signatures. These solutions are too expensive for small microprocessor-style control systems. The paper shows that simple constraints on the physical design of the communication links permit a much more economical solution with just 2t+1 processors and one round of messages, without the need for unforgeable signatures.

 

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