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Simulation of highvoltage power switching transistors under forced gain and inductive load turn-off conditions

 

作者: D.J.Roulston,   J.-B.Quoirin,  

 

期刊: IEE Proceedings I (Solid-State and Electron Devices)  (IET Available online 1988)
卷期: Volume 135, issue 1  

页码: 7-12

 

年代: 1988

 

DOI:10.1049/ip-i-1.1988.0002

 

出版商: IEE

 

数据来源: IET

 

摘要:

Computer simulation under static conditions is performed to compare gain and saturation voltage with collector current for a power switching transistor for which process data had been measured. The transistor simulation is then carried out for a range of static solutions to generate look-up tables forming the circuit CAD model. A circuit analysis program is then used to examine the variation of current density with time within the transistor. Comparing instantaneous current density and collector-emitter voltage with a static solution of the ionisation integral under high current density conditions allows prediction of second breakdown under reverse base drive with inductive load. Computer results are compared with measured data.

 

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