An algorithm for the partitioning of logic circuits
作者:
M.W.Roberts,
P.K.Lala,
期刊:
IEE Proceedings E (Computers and Digital Techniques)
(IET Available online 1984)
卷期:
Volume 131,
issue 4
页码: 113-118
年代: 1984
DOI:10.1049/ip-e.1984.0021
出版商: IEE
数据来源: IET
摘要:
The exhaustive testing of today's digital circuits is not possible, owing to the vast test sequences which would have to be applied. Breaking down the circuit into manageable subcircuits (partitioning) makes exhaustive testing practicable. Partitioning has previously been done by the designer of the circuit in rather anad hocmanner. The paper describes an algorithm which can be used to find the partitioning points in a circuit. The algorithm is illustrated for circuits containing reconvergent and nonreconvergent fan-outs.
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