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Device and interconnect structures suitable for ultrahigh‐speed LSIs

 

作者: Tadahiro Ohmi,   Shigeru Imai,   Takashi Hashimoto,  

 

期刊: Electronics and Communications in Japan (Part II: Electronics)  (WILEY Available online 1990)
卷期: Volume 73, issue 3  

页码: 74-80

 

ISSN:8756-663X

 

年代: 1990

 

DOI:10.1002/ecjb.4420730309

 

出版商: Wiley Subscription Services, Inc., A Wiley Company

 

数据来源: WILEY

 

摘要:

AbstractFor realization of ultrahigh‐speed LSIs, devices with large current driving capabilities and interconnects with small parasitic resistances and small parasitic capacitances are desired. When a high‐speed signal propagates along the conventional metal‐insulator semiconductor (MIS) interconnect, the signal is subject to waveform distortion due to the power consumption by the current induced in an Si substrate. On the other hand, an interconnect‐ground capacitance with a certain magnitude is required for suppression of cross talk. For these reasons, an interconnect of the metal‐oxide‐metal structure is proposed.Next, in regard to devices, it is considered that the MOS transistor is an induced charge control device and hence the speed increase can be accomplished with superposition of the potential control function of the bipolar transistor. This objective is accomplished in the current overshoot transistor in which the floating potential of the channel formation region of the SOIMOSFET is used intentionally. If the base width of the bipolar transistor is made extremely small, the carrier velocity is saturated so that the current value becomes independent of the base width. In addition, the difference between the uniform base and the graded base disappears. In the ultra‐high‐speed LSIs, the load to the interconnect increases due to the cross‐talk suppression. Therefore, the importance of these devices with large current driving capabilities becomes even

 

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